The present invention relates to a Raster Output Scanner (ROS) and, more particularly, to the use of a multi-phased crystal oscillator clock output to reduce ROS scan line jitter.
In polygon ROS laser printers, a laser generates a light beam which is modulated in accordance with information contained in video image signals. The modulated light beam is collimated and focused onto the surface of a rotating, multi-faceted polygon which scans the modulated light beam through a post-polygon optical system and onto the photosensitive imaging surface. The polygon is rotated by a motor with the rotational speed of the motor controlling the image resolution in the direction of motion of the imaging surface (process direction). Image resolution in the scanning direction is a function of the image signal, or pixel rate. The resolution in the scan direction is determined by the image signal or pixel clock frequency. Each mirrored facet of the polygon provides image information corresponding to one horizontal scan line. Each scan line is initiated by a generation of a start-of-scan (SOS) signal and ended by an end-of-scan (EOS) signal. The start-of-scan signal in turn initiates a pixel clock count which controls the modulation image information signal source which in turn controls the modulation of the laser output.
When using a crystal oscillator for the clock in a polygon ROS laser printer, facet jitter is a motor aberration which occurs at every scan line; i.e. every facet scan. Jitter is caused because the crystal frequency is asynchronous with the polygon rotational frequency, so that the SOS signal can occur at any point within one crystal clock period. This results in up to one clock period jitter of the image relative to the SOS, since the image leading edge is defined by the first pixel clock after the SOS rising edge. Prior art techniques for compensating for jitter disclose the use of oscillators which are enabled by an SOS signal with delay circuitry. These applications are described in, for example, U.S. Pat. Nos. 4,587,531 and 4,677,296. The oscillators described in these references are not stable enough over temperature ranges for printer applications requiring very stable pixel clocks.
According to a first embodiment of the present invention, the output of a crystal pixel clock oscillator is subdivided by delay and inverter circuitry into multiple phase outputs. Data latch and multiplexing circuitry is provided to select that clock phase output which is closest to the arrival,subsequent in time, to the SOS signal. As one example, the crystal oscillator output is subdivided into eight phased outputs. One of the outputs is identified as being closest in time to the arrival of the SOS signal and is used for the pixel clock. This particular scheme limits the scan-to-scan jitter to within 1/8 the pixel period. In a second and third embodiment, equal or greater jitter improvement is realized using circuitry that subdivides the oscillator outputs without using delay circuitry. More particularly, the present invention relates to a method of reducing fast scan jitter as the scanning beam of a Raster Output Scanner scans across a recording member, said scanner including means for modulating said beam in accordance with signal inputs controlled by a pixel clock, said method comprising the steps of:
detecting said recording beam prior to the start-of-scan (SOS) of a scan line and generating an SOS output signal having a rising and falling edge, PA1 subdividing the output of a crystal oscillator into multiple phased outputs, each output having a rising and leading edge separated by phase, PA1 identifying the phased output having a rising edge closest in time to the rising edge of the SOS signal, and PA1 using said identified phased output as the pixel clock for the scan line.